Advanced Peripheral Bus 3 : Verification IP
Overview
This is a simple case study on the APB3 VIP which I built in my spare time. The architecture will be similar to some models you might have seen online, but mostly it is different but still easy to understand. I'll start with explaining the testplan, checkplan, then the architecture of the UVM VIP itself and then we'll move onto the file structure of the VIP. Also, it will give you an idea of how a test plan is supposed to look like.
APB3 VIP UVM Architecture
Advice to any new reader : If you are feeling this is too overwhelming, then these are the things I recommentd you follow in order to understand this VIP.
1. Go through the VIP Package file
( HERE )
to understand the order of compilation
2. Understand the VIP Architecture and review the TOP FILE
( HERE )
to understand how the VIP and the RTL are interacting with each other.
3. Finally, take a simple test as a reference and review the code for all the components