An LFSR (Linear Feedback Shift Register) is a type of circuit that generates a sequence of bits by shifting them and feeding some back in a specific pattern. It's used in encryption, error correction, and creating pseudorandom sequences due to its efficiency and simplicity.

A CRC (Cyclic Redundancy Check) generator is a mathematical algorithm used to create checksums or error-detecting codes in data transmission or storage. It generates a fixed-size checksum or hash based on the input data's bits. This checksum, appended to the data, allows for error detection during transmission or storage.

Serial CRC blocks are the ones which have Flip Flops cascaded and require multiple clocks to generate the final CRC value. The schematic given here is an example for a "Serial CRC Generation" block.

An asynchronous FIFO is a multi-stage buffer which helps in avoiding data loss when information is transferred from a fast clock domain system to a slow clock domain system. "FIFO" stands for First-In-First-Out and in programmers lingo, its also functionally known to behave as a Queue.