Display system tasks in SystemVerilog are used for printing information to the simulation log during simulation. They are primarily used for debugging and monitoring purposes. These tasks allow you to output messages, variables, expressions, and values to the simulation log, helping you understand the behavior of your design and testbench during simulation.
System Task | Description |
---|---|
$display | Print a string in the terminal |
$write | Prints a string to the terminal but without the newline character in the end |
$displayb | Prints the value of the passed variable in its binary format |
$writeb | Prints the value of the passed variable in its binary format without new line character |
$displayh | Prints the value of the passed variable in its hexadecimal format |
$writeh | Prints the value of the passed variable in its hexadecimal format without new line character |
$displayo | Prints the value of the passed variable in its octal format |
$writeo | Prints the value of the passed variable in its octal format without new line character |
$strobe | Prints the string passed but only the last instance of a $strobe is executed, ie multiple $strobes will be ignored |
$monitor | At the postponed region, if there is a change in the variables value with respect to its pre poned region value, then the $monitor is printed |
$strobeb | Same as $strobe but prints the variable in binary format |
$monitorb | Same as $monitor but prints the variable in binary format |
$strobeh | Same as $strobe but prints the variable in hexadecimal format |
$monitorh | Same as $monitor but prints the variable in hexadecimal format |
$strobeo | Same as $strobe but prints the variable in octal format |
$monitoro | Same as $monitor but prints the variable in octal format |
$monitoroff | Temporarily disables all the $monitor instances |
$monitoron | Enabled all the $monitor instances |